Intermediate Bus Architecture with a Quasi-Regulated Bus Converter

ABSTRACT

A dc-dc converter system comprises a quasi-regulated bus converter and plural regulation stages that regulate the output of the bus converter. The bus converter has at least one controlled rectifier with a parallel uncontrolled rectifier. A control circuit controls the controlled rectifier to cause a normally non-regulated mode of operation through a portion of an operating range of source voltage and a regulated output during another portion. The bus converter may be an isolation stage having primary and secondary transformer winding circuits. For the non-regulated output, each primary winding has a voltage waveform with a fixed duty cycle. The fixed duty cycle causes substantially uninterrupted flow of power during non-regulated operation. Inductors at the bus converter input and in a filter at the output of the bus converter may saturate during non-regulated operation.

RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No.12/870,326, filed Aug. 27, 2010, now U.S. Pat. No. 8,149,597, which is acontinuation of U.S. application Ser. No. 11/982,327, filed Nov. 1,2007, now U.S. Pat. No. 7,787,261, which claims the benefit of U.S.Provisional Application No. 60/855,971, filed on Nov. 1, 2006.

The entire teachings of the above applications are incorporated hereinby reference.

BACKGROUND OF THE INVENTION

U.S. Pat. No. 5,999,417 (the '417 patent) and U.S. Pat. No. 7,050,309(the '309 patent) describe what is here referred to as the “IntermediateBus Architecture” and “bus converters.” The entire teachings of thesepatents are incorporated herein by reference.

The Intermediate Bus Architecture (IBA) has become a popular approachfor providing multiple output voltages (for loads such as digitalcircuits) from a single input voltage source. A first dc-dc converter(sometimes called a “bus converter”), usually providing isolationthrough a transformer, is used to change the source voltage, say 48V, toan intermediate voltage, say 12V. This intermediate voltage is then usedas the input to several non-isolated dc-dc converters (sometimes called“P.O.L. converters,” for “point-of-load”) or linear regulators, each ofwhich create a regulated output voltage appropriate for their respectiveloads.

When the range of the source voltage is narrow enough, the bus convertercan be a device that normally does not regulate. It simply isolates andconverts the source voltage to the intermediate voltage by virtue of theturns-ratio of its transformer. For instance, it may have a turns-ratioof 4:1, so that a 48V source becomes a 12V intermediate voltage. As thesource voltage ranges from 38V to 56V, the intermediate voltagecorrespondingly ranges from 9V to 14V. This type of bus converter willbe referred to herein as a “non-regulated bus converter.”

Since the non-regulated bus converter does not normally regulate (itregulates only during a turn-on or turn-off transient, or during acurrent-limit condition, and the like), the intermediate voltagedisplays a “droop” characteristic. By this it is meant that the value ofthe intermediate voltage decreases as the current flowing out of the busconverter increases. For the example given above, this might make theintermediate voltage range from 8.5V to 14V over the full range ofsource voltage and bus converter output current.

This variation of the intermediate voltage is acceptable since theP.O.L.'s can typically operate over such a range of their input voltage.

When the range of the source voltage is wider, such as 36V to 75V, oreven 36V to 100V, then a different type of bus converter is often usedbecause the non-regulated bus converter would give too much variation inthe intermediate voltage for the P.O.L.'s to handle. This second type ofbus converter, referred to herein as a “semi-regulated bus converter,”provides regulation (as well as isolation) so that the intermediatevoltage does not vary proportionally to the source voltage. To firstorder it holds the intermediate voltage approximately constant, althoughit does permit this voltage to droop as the bus converter's outputcurrent increases so that some costs might be saved. For this reason,this type of bus converter is referred to as “semi-regulated.” The droopin the intermediate voltage, which might be around 5% to 10% of thenominal voltage as the bus converter's output current ranges from zeroto full rated current, is well within the range of what a typical P.O.L.can handle for its input voltage.

A semi-regulated bus converter has a lower level of performance, interms of efficiency and power handling capability, than thenon-regulated bus converter as a result of its design to provideregulation over the full range of the source voltage.

SUMMARY OF THE INVENTION

To address the problem of reduced performance of the bus converter foran application where the source voltage range is relatively wide, a newtype of bus converter is presented here. This bus converter, hereincalled a “quasi-regulated bus converter,” is normally non-regulatingover some portion of the source voltage operating range, and regulating(either fully regulating or semi-regulating) over another portion of theoperating range. The operating range is the intended source voltagerange where the system is expected to operate and meet itsspecifications and is generally specified for each converter and/or forthe application in which it is applied. Typically, the converter onlyreceives a source voltage outside its operating range during a transientsuch as start up or shut down.

For instance, in a system where the input voltage ranges from 36V to100V, the quasi-regulated bus converter might be designed so that itdoes not normally regulate when the source voltage is between 36V and56V. If the transformer turns ratio is 4:1, the intermediate voltagewould then vary from 9V to 14V if we do not account for the droopcharacteristic, and from perhaps 8.5V to 14V if we do account for thedroop.

When the source voltage is between 56V and 100V, the quasi-regulated busconverter would then regulate its output, perhaps with a droopcharacteristic. In one example, the intermediate voltage would remainconstant at 14V (perhaps minus a droop) over this 56V-100V range ofsource voltage.

With such an approach, the quasi-regulated bus converter keeps theintermediate voltage within a range that is acceptable for typicalP.O.L.'s, but it does not try to regulate or semi-regulate the busvoltage to a range as tight as 10% (or so), as the semi-regulated busconverter would. As such, the quasi-regulated converter is capable ofachieving an efficiency and power handling capability that is higherthan the semi-regulated bus converter.

The exact details of how the source voltage range should be dividedbetween these two modes of operation in the quasi-regulated converterare flexible, and they depend on the design of the converter and on thedetails of the application.

For instance, the non-regulated mode of operation might be at the highend of the source voltage range instead of the low end, as mentioned inthe example above. It might even be in a middle section of the sourcevoltage range, with regulation occurring at either end of the range. Theacceptable range of the intermediate voltage might be different than theexample given above based on the needs of the P.O.L.'s or on a desire tooptimize the performance of the total system. For instance, the onset ofthe regulation range might occur in the 50V-52V level, instead of the56V level mentioned previously.

Provisions for handling start-up and shut-down, and protection featuressuch as over-voltage, over-current, over-temperature, and back-drivecurrent limiting would be added to the quasi-regulated bus converter asrequired.

A dc-dc converter system may comprise a bus converter that receives asource voltage and converts the source voltage to an output. The busconverter may include a control circuit that normally controls the busconverter to cause a non-regulated mode of operation, over a portion ofan operating range of a source voltage, where the output isnon-regulated. The control circuit normally causes a regulated mode ofoperation, over another portion of the operation range of the sourcevoltage, where the output is regulated. A plurality of regulation stageseach receive the output of the bus converter and regulate a regulationstage output.

The bus converter may be an isolation stage while the regulation stagesare non-isolating. The regulated mode of operation of the bus convertermay be a semi-regulated mode. The regulation stages may be switchingregulators.

The bus converter may comprise at least one transformer with at leastone primary winding and at least one secondary winding. The primarywinding circuit receives the source voltage and has an input filter withan input inductor. The secondary winding circuit has plural controlledrectifiers with parallel uncontrolled rectifiers, and output filterhaving an output inductor and the bus converter output.

For the non-regulated mode of operation, the control circuit may controlthe duty cycle of the controlled rectifiers to cause substantiallyuninterrupted flow of power through the dc-dc converter. Each controlledrectifier of the secondary winding circuit may be turned on and off insynchronization with a voltage waveform across a primary transformerwinding to provide the output . Each primary winding may have a voltagewaveform for the non-regulated mode of operation with a fixed duty cycleand transition times which are short relative to the on state and offstate times of the controlled rectifiers.

The bus converter may comprise a filter having an inductor thatsaturates during a non-regulating mode of operation. Such inductors maybe included in an input filter and/or in an output filter.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing will be apparent from the following more particulardescription of example embodiments of the invention, as illustrated inthe accompanying drawings in which like reference characters refer tothe same parts throughout the different views.

The drawings are not necessarily to scale, emphasis instead being placedupon illustrating embodiments of the present invention.

FIG. 1: Block diagram of an Intermediate Bus Architecture (IBA).

FIG. 2: One example of a Bus Converter power circuit topology which,based on how it is controlled and on the component selection, could beused for all three types of Bus Converters.

FIGS. 3A-C: Three possible ways to divide the total range of V_(S) intonon-regulating and (semi-)regulating regions.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 shows a block diagram of an Intermediate Bus Architecture. Thesource of power 101 provides a dc voltage V_(S), which may nominally be,for example, 48 volts, but which may vary over a range above and belowthis nominal, the width of the range being dependent on the application.The bus converter 102 then converts this voltage to a different nominalvoltage; for example 12V. It also provides the electrical isolationneeded for safety regulations and to avoid ground loop noise problems.

The output of the bus converter provides an intermediate voltage V_(I)103. Capacitors 104 are typically connected between this intermediatenode and ground to provide additional filtering. Also connected to theintermediate node are the inputs of several non-isolated switchingregulators 105, which are called P.O.L.'s. These P.O.L.'s are usually“buck-converters,” and in today's technology they often incorporatesynchronous rectifiers to improve efficiency. They each create an outputvoltage 106 that is held constant (i.e. regulated) even as theintermediate voltage or their output current varies. These outputvoltages are typically supplied to digital and analog load circuitry.

It is also possible for one or more of the P.O.L.'s to be of a designthat gives an output voltage higher than the intermediate voltage, or togive an output voltage that is negative with respect to the groundpotential. Various topologies such as a “boost-converter,” a “buck-boostconverter,” and a “Sepic converter” could be used for these purposes,and they (and others) are well known in the art.

The bus converter of FIG. 1 could be a non-regulated bus converter, asemi-regulated bus converter, or, as described herein, a“quasi-regulated bus converter.” The choice depends, in part, on howmuch the source voltage varies and on how wide a range of intermediatevoltage the P.O.L.s can tolerate. Some sources stay within a relativelytight range; for example 48V ±10%. Others vary over a moderate range;for example 36V to 56V. Yet others have a very wide range, for example36V to 100V. Some P.O.L.'s are designed to handle an input voltage thatis relatively tight; for example 12V ±20%. Others are designed to handlea wider range; for example 7V to 15V.

One example of a non-regulated bus converter is described in the '309patent. As shown in FIG. 2 here, it uses a full-bridge topology for theswitches 201-204 connected to the primary winding 209 of the isolationtransformer, and a center-tapped topology for the secondary side.Synchronous rectifiers, composed of controlled rectifiers 205 and 206and their corresponding uncontrolled rectifiers 207 and 208 areconnected to the center-tapped secondary windings 210 and 211,respectively. The synchronous rectifiers are typically MOSFETs, wherethe channel is the controlled rectifier and the parasitic body diode isthe uncontrolled rectifier. An external diode could also be used for theuncontrolled rectifier.

A capacitor 214 may be placed in series with the primary winding 209 toensure flux balance. Other means of achieving flux balance are wellknown in the art.

Inductors 212 and 213 represent the leakage inductance of thetransformer.

Inductor 216 and capacitor 217 form a low-pass output filter. Thevoltage across capacitor 217 is the intermediate voltage 103 shown inFIG. 1. Capacitor 218 and inductor 219 provide a low-pass filter for thebus converter's input. It may be connected directly to the sourcevoltage 101, or there may be additional filter elements between the two.

A control circuit 220 provides the gate drive signals for the variouspower switches. It typically senses voltages and currents within thepower circuit, and it provides the desired duty cycle/switch timing forthe switches.

During normal operation the circuit is operated at a fixed duty cyclewhere a positive voltage (of value V_(S)) is applied across thetransformer's primary winding for the first half of the cycle, and anegative voltage (−V_(S)) is applied across the winding for the secondhalf of the cycle. Except for the relatively short switch transitiontimes between these two half cycles, power is always flowing from thesource, through the transformer, and then to the output of the busconverter. Except for the short switch transitions, there is no explicit“freewheeling” portion of the cycle where the power flow through thetransformer is interrupted and the flow of power to the output ismaintained by the output inductor 216 and capacitor 217 alone.

The synchronous rectifiers in the secondary circuit rectify the outputof the transformer and create a dc voltage. This is than passed throughthe low-pass filter 216,217. The components in this filter, particularlythe inductor, are relatively small due to the fact that during normaloperation they only need to filter the interruption of power during theshort switch transition times at the end of each half-cycle. Theseinterruptions might last only about 50 ns, which is very short comparedto the half-cycle, which may be 2 us long, depending on the details ofthe design.

Consider the case where the source voltage varies over a relativelynarrow range from 36V to 56V. Assume the turns-ratio of the transformeris 4:1 (primary to secondary). If there were no load current flowing,the output voltage of the bus converter, V_(I), would be approximately ¼that of the source voltage, V_(S). In other words, V_(I) would rangefrom 9V to 14V. However, as the load current builds, the V_(I) falls, or“droops,” due to the resistances of the power path and the voltage dropsrequired across the leakage inductances to commutate the current fromone secondary winding to the other each half cycle. This droop mighttypically be about 0.5V at full load current, so the output voltagewould range from approximately 8.5V (at full load and V_(S)=36V) to 14V(at zero load and V_(S)=56V).

This non-regulated bus converter can be very efficient (typically 97%)for several reasons, all associated with the fact that it does notnormally make use of a freewheeling portion of the cycle to regulate.First, power is transferred from source to output for nearly 100% of thecycle and as a result, the rms value of the current flowing through allthe components of the converter is minimized. Second, the turns-ratio ofthe transformer can be higher than it otherwise would be, so that thecurrents flowing on the primary side are smaller for a given outputcurrent and the off-state voltage ratings of the synchronous rectifiersare smaller for a given maximum source voltage. Third, the switchtransitions between one half-cycle and the next are nearly losslessbecause there is not a need to recover from a freewheeling period.Fourth, the output inductor 216 is relatively small in value, and as aresult can be relatively low in losses for a given volume of the device.

In addition, the non-regulated bus converter does not need to havecontrol signals that bridge the isolation barrier between the primaryand secondary sides of the circuit. As mentioned in the '417 patent,there is no need to feed back a signal representing the output voltagesince there is no attempt to regulate it. There is also no need to sendcontrol signals to the synchronous rectifiers. Their control signals canbe easily derived from the voltages on the secondary windings, asdescribed in the '309 and the '417 patents. Besides saving cost, thislack of circuitry that bridges the isolation barrier permits thetransformer to occupy the entire physical width of the converter, andtherefore it can have a lower winding resistance, higher efficiency, andbetter thermal performance.

During transients such as startup and shutdown, or in situations wherethe output current must be limited from getting either too high or toonegative, the non-regulated bus converter may be operated with a dutycycle less than 100%, and therefore with an associated freewheelingperiod. For instance, at startup the duty cycle may be slowly rampedfrom 0% to 100% to cause the output voltage V_(I) to slowly rise to itsfinal value. As explained in the '309 patent, there are additionallosses during these abnormal conditions due to dissipative switchtransitions and the fact that the controlled rectifiers may not beconducting during the freewheeling period, depending on the controlstrategy used. In addition, the output ripple voltage may be larger thannormal. But these conditions can be tolerated since they are transientin nature and do not represent the normal use of the non-regulated busconverter.

When the input voltage varies over a range that is too wide to use anon-regulated bus converter with a given P.O.L. technology, asemi-regulated bus converter is often used. Such a bus converter couldhave the same full-bridge topology shown in FIG. 2. The difference isthat now the converter is designed to have its duty cycle vary as thesource voltage varies so that the intermediate voltage V_(I) stays neara nominal value. For instance, if the source voltage V_(S) varies from36V to 100V, the semi-regulated bus converter might be designed to havea duty cycle near 100% when V_(S)=36V, and a duty cycle of about 36%when V_(S)=100V.

Since it is not necessary, in an IBA application, to have theintermediate bus voltage be fully regulated, a semi-regulated converteris usually designed such that the feedback signal that determines theduty cycle is derived from one or more signals available on the primaryside of the converter that are indicative of the output voltage. Onepossible signal is the source voltage, V_(S). Another possible signal isthe voltage across the primary transformer winding.

These signals do not account for voltage drops across resistances in thepower path, nor do they account for the voltage drops across leakageinductances that are required to commutate the load current from onesecondary winding to the other. As such, a semi-regulated bus converterwill have an output voltage that falls, or droops, as the load currentis increased. A droop of 5%-10% is typical as the load current variesfrom zero to full rated current.

If the droop is larger than desired, then it is possible to reduce it bymeasuring a signal on the primary side that is indicative of the currentflowing through the power stage. This signal, multiplied by anappropriate gain, can be used to modify the duty cycle to give a higheroutput voltage to compensate for the droop, as described in the '417patent. Since the resistances of the power path are temperaturedependent, it might also be desirable to adjust the effect of thiscompensation circuitry as a function of the converter's temperature.

A semi-regulated bus converter cannot be as efficient as a non-regulatedbus converter, all other things held constant. By definition, it has afreewheeling period for all values of the source voltage except,perhaps, the lowest. It therefore isn't able to fully utilize thetransformer and the power switching devices. There is also a significantswitching loss at the end of each freewheeling period due to the leakageinductance of the transformer and the parasitic capacitances of thepower switches. Third, the transformer's turns ratio would be lowered,which means that the currents on the primary side are higher for a givenload current and the off-state ratings of the synchronous rectifiers arehigher for a given maximum source voltage. Finally, the output inductorwould be made relatively large in value to minimize the ripple in itscurrent and the intermediate voltage. This large value of inductancetranslates into a physically larger and more dissipative device.

For instance, if the source voltage ranges from 36V to 100V, and theoutput voltage is to be nominally 12V (not counting the droop), theturns ratio for a semi-regulated bus converter must be 3:1. If thesource voltage had been 48V ±10% and a non-regulating bus converter wereused, it could have a turns ratio of 4:1 to create a nominal 12V output.This difference is significant with regard to the bus converter'sefficiency.

The output filter must do much more filtering on the semi-regulated busconverter than it has to on the non-regulated bus converter. Instead ofjust brief interruptions of power flow during the switch transitionseach half cycle, now the output filter must deal with interruptions thatlast for the duration of the freewheeling period. In general, this meansthat the output inductor must be much larger in value, peak energystorage, and physical size. As a result, more power is dissipated inthis inductor, and there is less room available on the converter forother components.

For example, consider the size of the non-regulated bus converter'sfilter inductor. During the switch transitions it will see the outputvoltage across it, but these transitions will last only about 50 ns. Incomparison, for the semi-regulated bus converter, the filter inductorwill see the output voltage across it for the length of the freewheelingperiod. In the example given above, the longest freewheeling period is64% of the cycle when V_(S) is 100V. If we assume a switching frequencyof 250 kHz, or 2 μs for each half cycle, then this maximum freewheelingperiod would be 1.28 μs long. To maintain the same current ripple in theinductor, the value of inductance would therefore need to be increasedby a factor of 25 for the semi-regulated bus converter as compared tothe non-regulated bus converter. This increase is so large that a morereasonable design might call for more inductor ripple current (to limitthe size of the inductor) and more output capacitor to achieve therequired ripple level in V_(I).

Overall, holding all other things constant, a semi-regulated busconverter that must handle a wide range of source voltage might be 94%efficient, while a non-regulated bus converter that is designed tohandle a narrower range of source voltage might be 97% efficient. Thisdifference translates into about twice the dissipated power for theformer compared to the latter, and therefore results in a lower powerhandling capability for the semi-regulated bus converter.

An alternate approach, newly described here, is the quasi-regulated busconverter. As mentioned earlier, this bus converter operates as anon-regulated bus converter over a portion of the range of the sourcevoltage, but then regulates its output over the rest of the range. Ingeneral, when the quasi-regulated converter is regulating its output, itmay do so with or without a droop characteristic.

The portion of the source range over which the bus converter isnon-regulating may be the low end of the range, the high end of therange, or some other portion, as depicted in FIG. 3, depending on thedesign of the converter. FIG. 3 a depicts the case where thenon-regulating range is at the lower end of the total range of V_(S).FIG. 3 b depicts the case where the non-regulating range is at thehigher end. And FIG. 3 c depicts the case where the non-regulating rangeis in the middle of the total range of V_(S).

As one example, a quasi-regulated bus converter could have the samefull-bridge topology shown in FIG. 2. Since this topology is inherentlya down-converter when it is regulating, the converter would be designedto be non-regulating over the lower end of the source range, and thenregulating, or semi-regulating, over the higher end of the range.

Assume the source voltage ranges from 36V to 100V and that the P.O.L.'scan tolerate an intermediate voltage that varies between 7V and 15V. Ifthe transformer is given a turns-ratio of 4:1, then when thequasi-regulated bus converter is operated in a non-regulating mannerwhere its duty cycle is nearly 100% (except for the short switchtransitions), the intermediate voltage V_(I) will be approximately ¼that of the source voltage V_(S), minus the droop. Assume that this modeof operation exists whenever the source voltage is in the 36V to 56Vrange. This would result in an output voltage that varies from 9V to 14Vat zero bus converter output current. If we consider the droop, theoutput voltage might vary from 8.5V to 14V over the full range of sourcevoltage and bus converter output current. This range can be handled bythe P.O.L.'s mentioned above with appropriate margins at both ends ofthe range.

Once the source voltage gets above 56V, the control circuit 220 of thequasi-regulated bus converter will reduce the duty cycle appropriatelyto keep the output voltage from rising any higher than, say, 14V. Thecontrol strategy during this range of source voltage could be the sameas is used in the semi-regulating bus converter, in which case theoutput voltage will display a droop characteristic in this mode ofoperation, as well. Just as for the semi-regulated bus converter, thisdroop could be reduced by making use of a signal indicative of current(and of temperature, for further accuracy). Or the control strategycould, if desired, create a tightly regulated output by feeding back asignal from the output. The former approach is simpler, cheaper, and allthat is needed for many IBA applications.

The advantages gained by using the quasi-regulated bus converterapproach instead of the semi-regulated bus converter are several. First,the turns-ratio of the transformer is 4:1 instead of 3:1. This reducesboth the current levels in the primary side of the circuit and thevoltage stresses on the secondary side by 25%.

Second, the maximum freewheeling period will be only 44% of thehalf-cycle period for this example of the quasi-regulated bus converter,as compared to a 64% value for the corresponding semi-regulated busconverter. This permits the output inductor to be reduced byapproximately 33% in value.

Because V_(I) can go as low as 9V for the example given above, theoutput inductor of the quasi-regulated bus converter must carry a highermaximum dc current than does the inductor in the semi-regulated busconverter whose output voltage remains at 12V (ignoring droop in bothcases). For instance, if we assume the output power of the bus converteris 240W, the quasi-regulated bus converter's inductor would have tocarry a dc current of 27A; whereas, the semi-regulated bus converter'sinductor would have to carry only 20A. This would appear to require thatthe inductor of the quasi-regulated bus converter be designed to storemuch more peak energy, even though its inductance value is smaller.

However, it is possible to let the quasi-regulated bus converter'sinductor saturate at the higher current levels associated with V_(S)below 56V and V_(I) therefore falling below 14V (again, ignoring droop)since for that condition, the converter is being operated at nearly 100%duty cycle and very little output inductance is therefore required. Theresidual inductance that remains after the core saturates will typicallybe sufficient. Doing this makes the quasi-regulated bus converter'soutput inductor much smaller than can be achieved with thesemi-regulated bus converter.

Similarly, the input filter inductor 219 could be made physicallysmaller by allowing it to saturate when V_(S) is low enough such thatthat quasi-regulated bus converter is operating at nearly 100% dutycycle. In this condition there is much less ripple caused at the inputcompared to when there is a freewheeling period, and so less inputfilter inductance is needed.

An additional advantage of the quasi-regulated bus converter is the factthat it avoids the switching losses of recovering from a freewheelingperiod over a significant portion of the range of the source voltage.For instance, in the example given above, when V_(S) is low and thecurrents are therefore relatively high, the quasi-regulated busconverter is operating with nearly 100% duty cycle, which keeps theswitching losses small just when the conduction losses are at theirhighest. At higher values of V_(S), when the duty cycle is reduced below100% and the switching losses increase, the currents are then lower sothat the conduction losses are smaller. Overall, the total dissipationin the semiconductor devices is reduced compared to the semi-regulatedbus converter for any given operating point.

Overall, holding all other things constant, a quasi-regulated busconverter able to handle a source voltage range of 36V to 100V will beabout 96% efficient, as compared to a semi-regulated bus converter whichwould be only 94% efficient. This results in only two-thirds the powerdissipation for the same output power, and will permit a higher powerdensity capability.

The description of the quasi-regulated bus converter presented above hasbeen based on a power circuit topology that is an isolateddown-converter. It is also possible to base a quasi-regulated busconverter on a topology that is an isolated up-converter, such as acenter-tapped, push-pull topology. For this topology, the controlstrategy might be to maintain 100% duty cycle for the high end of thesource voltage, and then reduce the duty cycle (and therefore increasethe output voltage) when the source voltage is at the lower end of itsrange.

Similarly, one skilled in the art could configure a quasi-regulated busconverter based on an isolated up-down converter. For this topology thecontrol strategy might be to maintain 100% duty cycle for the middleportion of the range of the source voltage, and then regulate at boththe low and the high end of the range.

While this invention has been particularly shown and described withreferences to preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade therein without departing from the spirit and scope of theinvention as defined by the appended claims. Those skilled in the artwill recognize or be able to ascertain using no more than routineexperimentation many equivalents to the specific embodiments of theinvention described specifically herein. Such equivalents are intendedto be encompassed in the scope of the claims. For instance, othertopologies besides the full-bridge topology, such as the half-bridgetopology and others known in the art could be used. In addition, theideas presented above for isolated bus converters could also be used forbus converters based on non-isolated power circuit topologies.

1. (canceled)
 2. A dc-dc converter system comprising: an isolated dc-dcbus converter that receives a dc source voltage and converts the dcsource voltage to a dc intermediate voltage output, the dc-dc busconverter: in normal operation, having a non-regulated mode ofoperation, over a low voltage portion of an operating range of the dcsource voltage, where the dc intermediate voltage output is notregulated by the bus converter and the dc intermediate voltage outputdisplays a droop characteristic; and in normal operation, having a fullyregulated mode of operation, over a high voltage portion of theoperating range of the dc source voltage, where the dc intermediatevoltage output is fully regulated by the bus converter; and a pluralityof non-isolated switching regulators, each receiving the dc intermediatevoltage output of the dc-dc bus converter and regulating a switchingregulator output.
 3. A dc-dc converter system as claimed in claim 2wherein the fully regulated mode of operation of the dc-dc bus convertercreates a tightly regulated dc intermediate voltage output by feedingback a signal from the dc intermediate voltage output.
 4. A dc-dcconverter system as claimed in claim 3 wherein the dc-dc bus convertercomprises: at least one transformer with at least one primary windingand at least one secondary winding; a primary winding circuit thatreceives the dc source voltage; and a secondary winding circuit havingplural controlled rectifiers with parallel uncontrolled rectifiers andan output filter having an output inductor.
 5. A dc-dc converter systemas claimed in claim 4 wherein the controlled rectifiers are driven fromsignals derived from the at least one secondary winding.
 6. A dc-dcconverter system as claimed in claim 4 wherein the non-regulated mode ofoperation has a duty cycle of the controlled rectifiers to causesubstantially uninterrupted flow of power through the dc-dc busconverter.
 7. A dc-dc converter system as claimed in claim 4 whereineach controlled rectifier is turned on and off in synchronization with avoltage waveform across a primary transformer winding to provide the dcintermediate voltage output, each primary winding having a voltagewaveform for the non-regulated mode of operation with a fixed duty cycleand transition times which are short relative to the on state and offstate times of the controlled rectifiers.
 8. A dc-dc converter system asclaimed in claim 7 wherein the dc-dc bus converter further comprises afilter having an inductor that is allowed to saturate during thenon-regulated mode of operation.
 9. A dc-dc converter system as claimedin claim 7 wherein the dc-dc bus converter further comprises an outputfilter having an inductor that is allowed to saturate during thenon-regulated mode of operation.
 10. A dc-dc converter system as claimedin claim 4 wherein the transformer has a turns ratio of 4:1.
 11. A dc-dcconverter system as claimed in claim 3 wherein the non-regulated mode ofoperation has a fixed duty cycle.
 12. A dc-dc converter system asclaimed in claim 2 wherein the dc-dc bus converter comprises: at leastone transformer with at least one primary winding and at least onesecondary winding; a primary winding circuit that receives the dc sourcevoltage; and a secondary winding circuit having plural controlledrectifiers with parallel uncontrolled rectifiers and an output filterhaving an output inductor.
 13. A dc-dc converter system as claimed inclaim 12 wherein the controlled rectifiers are driven from signalsderived from the at least one secondary winding.
 14. A dc-dc convertersystem as claimed in claim 12 wherein the non-regulated mode ofoperation has a duty cycle of the controlled rectifiers to causesubstantially uninterrupted flow of power through the dc-dc busconverter.
 15. A dc-dc converter system as claimed in claim 12 whereineach controlled rectifier is turned on and off in synchronization with avoltage waveform across a primary transformer winding to provide the dcintermediate voltage output, each primary winding having a voltagewaveform for the non-regulated mode of operation with a fixed duty cycleand transition times which are short relative to the on state and offstate times of the controlled rectifiers.
 16. A dc-dc converter systemas claimed in claim 15 wherein the dc-dc bus converter further comprisesa filter having an inductor that is allowed to saturate during thenon-regulated mode of operation.
 17. A dc-dc converter system as claimedin claim 15 wherein the dc-dc bus converter further comprises an outputfilter having an inductor that is allowed to saturate during thenon-regulated mode of operation.
 18. A dc-dc converter system as claimedin claim 12 wherein the transformer has a turns ratio of 4:1.
 19. Adc-dc converter system as claimed in claim 2 wherein the dc-dc busconverter further comprises a filter having an inductor that is allowedto saturate during the non-regulated mode of operation.
 20. A dc-dcconverter system as claimed in claim 2 wherein the dc-dc bus converterfurther comprises an output filter having an inductor that is allowed tosaturate during the non-regulated mode of operation.
 21. A dc-dcconverter system as claimed in claim 2 wherein the non-regulated mode ofoperation has a fixed duty cycle.